Since July 7, 2005 you are visitor number 15098
GOALS
I seek technical responsibility for projects where I can use my knowledge
and experience with hardware and software and their trade-offs to design
and implement real-time embedded systems for solving interesting and
typically unique and difficult engineering problem applications.
I seek out and resolve the most difficult engineering problems because of
the great satisfaction I receive when solving the most challenging issues.
(click here to read a technical writing sample)
Since December 2006:
Maintained and updated the
IEEE Boston Consultants Network Website
(www.boston-consult.com)
and mailing lists using HTML, PHP, Javascript, and SQL.
Natick, Massachusetts, November 2006 to December 2006:
Researched various 802.11a/b/g/n and HomePlug Power Line Communication
networks and
power amplifier technologies for a consumer audio startup company.
Azima, Inc.,
Woburn, Massachusetts, September 2005 through January 2006, June & July 2006,
October & November 2006:
Designed and performed system and functional test plan updates for releases
1.2, 1.4 and 1.6
of a web-based predictive maintenance condition monitoring system for
rotating machines used by the power generation, steel, compressed gas, and
pharmaceutical industries.
Vibration and displacement are the primary conditions being
monitored and analyzed. Documented proper grounding and shielding techniques.
Conducted tests using TestLink test management and execution and
Mantis bug reporting tools. Configured hardware and software
for wireless 802.11 monitoring hubs using XML files on XP and Linux systems
running on various servers using Sybase and MySQL databases.
Primary development environment centered around LAMP programming.
SmartLink Radio Networks, Inc.,
Billerica, Massachusetts, February 2004 through September 2004:
Traveled to Newfield, Maine to assist in the technology transfer of all of
the technical hardware details for the SmartLink interoperable radio switching
and console dispatch system
(click here to see a photo of a SmartLink demo rack)
primarily used for Public Safety applications.
Generated detailed block diagrams for every major circuit board and module
in the present system. Participated in writing specifications for a new system
architecture. Wrote a dispatch console functional specification. Generated
and maintained a company-wide file containing a glossary of common
abbreviations and terms relevant to the Land Mobile Radio (LMR) and
Specialized Mobile Radio (SMR) marketplaces.
Performed integration and testing of Westel DRB-25 and Daniels MT-4 FM
VHF Project 25 (P25) repeater radios with BK Radio DPH5102X FM VHF P25
portable radios and the existing SmartLink radio networking system;
note that all radios were operated over the air with dummy transmitter loads
in the P25 digital mode. Performed analysis and
documentation for existing bus technologies, VoIP techniques, schematic
design notes, outdated components, relevant data sheets, radio paging
systems, repeater radio interface documentation, analog filter designs, and
a proposed DSP-based design for a universal radio channel interface card.
Performed evaluation for an IFR2975 Communications Analyzer in conjunction
with the P25 integration effort.
Documented new designs and interfaced P25 digital radios from four different
vendors to the SmartLink system for August 2004 trade show displays.
Walker LDJ Scientific, Inc.,
Worcester, Massachusetts, July 2003 thru February 2004:
Traveled to Troy, MI to perform the technology transfer of all the technical
details for large magnetizing and magnetic characterization machines after
LDJ Electronics was acquired by Walker Scientific and relocated to MA.
Fully documented all hardware and software magnetizer and hysteresisgraph
products and subsystems including assembly, cabling and calibration.
Provided R&D support for a low voltage (30 Volts DC) high current (400
Amperes) highly regulated current-controlled three-phase power supply used
to drive deflection coils at a European cyclotron for manufacturing medical
isotope compounds.
Provided customized hardware and software engineering for the Model 5800
Hysteresisgraph/Magnetometer for a customer in China. This machine is used
to characterize the magnetic properties of high carbon content steel samples
by plotting the samples B versus H curves using a special electromagnet with
auxiliary Hall effect and flux sensors in an integrated turnkey environment.
The programming environment consisted of Sax (Visual) Basic in an Integrated
Development Environment (IDE) for Windows 98/NT/2000/XP, coupled with a DOS-
based internal real-time embedded hardware controller system based on PC-104.
Provided customized hardware and software engineering for the model 6600
magnetizer; this equipment consists of banks of 216 high voltage electrolytic
capacitors
(click here to see a photo of the magnetizer rack)
charged to 900 Volts DC; High current SCR's (passing over 10,000
Amperes peak) then discharge the energy (34,020 Joules) stored in these
capacitors over a very short period of time (measured in milliseconds) into
one of two magnetizing fixtures
(click here to see a photo of the magnetizer system)
to magnetize eight- and ten-pole rotors used
in variable-speed electric motors for modern elevators.
The magnetizer uses the same IDE as the hysteresisgraph.
Produced, wrote, directed and acted in a video made
on the factory floor to demonstrate the operations of the magnetizer.
Thayer Scale, Inc.,
Pembroke, Massachusetts, September 2002 to April 2003:
Ported the EZ-3200 Loss in Weight Batching (LWB), Loss in Weight Feeding
(LWF),
(click here to see some portable C-language header code)
Weigh Belt Controller (BELT) and Pump (Rate) Controller software
applications
to the Series-5200 platform based on a proprietary PC-104 controller
using a proprietary operating system developed using
Microsoft Visual Studio Professional Edition 6.0 Visual C++.
Microsoft Visual Basic 6.0 was used to run emulations via serial port for
testing the LWB and LWF software.
Thayer Scale, Inc.,
Pembroke, Massachusetts, March 1995 to February 2002:
Reporting to the R & D manager, I worked
directly with in-house R & D, sales and applications engineers, field service,
drafting, manufacturing, laboratory testing, and corporate president,
providing design proposals, block diagrams, flow diagrams, state diagrams,
test plans, schematic diagrams, circuit board layouts, software releases,
release notes, and end-user operating manuals, and receiving feedback.
I designed and implemented the closed-loop feedback real-time multi-tasking
Loss of Weight Feeding (136 source files) and
Loss of Weight Batching (127 source files)
software products running on the in-house designed EZ-3200 hardware
(click here to see a photo of a four-slot EZ-3200 system)
with MC68332 CPU, and provided configuration management file dependency
MAKE files to automatically rebuild all applications. Provided hardware
support and corrections for field problems with proprietary LAN hardware.
Re-designed hardware to convert 8MHz. MC68332 CPU platform to 20MHz. and
re-wrote hardware PLD configuration files. Re-wrote portions of the
EZ-3200 custom operating system kernel and proprietary LAN network
communications,
and added support for all 254 unexpected vectored CPU interrupts. Re-wrote
existing Belt Controller (100 source files), Belt Integrator (99 source
files) and Pump Controller (89 source files) software applications for
multi-tasking, modularity and portability. Implemented proprietary signal
processing software for LVDT load cell linearization and temperature
compensation. Added proprietary signal processing software to Loss in Weight
applications for superior performance and accuracy especially at low feed
rates. Designed and implemented new software for Input and Output Scale
Location Compensation (SLC), Takeaway Conveyors, and Signal Out of Range
(SOR) disturbance protection mechanism. Upgraded the Belt Integrator
software application
for NTEP (National Type Evaluation Program) certification submission to NIST
(National Institute of Standards and Technology). Provided corrections to
EZ-3200 kernel PLC driver software for large-sized data transfers via Modbus
and Allen-Bradley PLC serial protocols. Added software to completely
configure, control, monitor and calibrate any application via PLC serial
protocols. Upgraded Belt Controller software application by adding support
for true sampling control with programmable sample and hold phases.
All hardware and software is currently in production and operating
world-wide in the field. Most software is written in CrossCode C-language
except for some critical startup and interrupt code written in MC68332
assembler language. The overall code structure is modular functional
programming, but the design relies heavily on data and functional
abstractions making it more portable and easily converted to an
object-oriented structure. The same portable software runs unedited on the
8MHz. and 20MHz. MC68332 CPU platforms and has now been smoothly ported to
the updated Series 5200 platform.
(click here to see a photo of a prototype Series 5200 system)
MIT Media Laboratory, Cambridge, Massachusetts, June 1999 to July 2000:
-Designed and prototyped a daughter board with multi-channel hi-speed AD768AR
DAC outputs for the ADI Sharc EZ-KIT LITE
(click here to see a photo of the Sharc EZ-KIT LITE)
with ADSP21061 Sharc DSP running at
40.0MHz. The hardware design is implemented in a Lattice ISPLSI2064E CPLD
allowing for in-circuit programmability via serial link to a PC. Wrote and
debugged the CPLD source file
(click here to view the CPLD source file)
to configure the DSP to DAC hardware interface.
The PROTEL-98 CAD system was used for schematic diagram capture, layout and
verification for the four-layer surface-mount printed circuit board
(click here to see a photo of the circuit board)
. Wrote
software in both Sharc DSP assembler
(click here to view a Sharc DSP assembler language source file)
and C-language
(click here to view a Sharc DSP C-language source file)
for real-time upsampling
for the ultrasonic Audio Spotlight ® project. The system can run in
stand-alone mode and supports a programmable command line interface via
serial port for adjusting runtime parameters in real-time. Design included
up-sampling at 4X audio rates, FIR filtering
(click here to view some low-pass digital FIR filter design plots)
, non-linear signal processing,
modulation and multiple output channels using a QS4A215Q1 analog multiplexer
and a system of sample-and-hold devices with low-pass analog filters.
Analog Devices, Inc., Norwood, Massachusetts, December 1997 to November 1999:
-Performed extensive audio testing using the Audio Precision System Two on
existing prototype printed circuit boards for debugging audio quality
complaints. Provided corrections for audio complaints to analog I/O portions
of the Csound audio music synthesis hardware platforms. Worked with MIT
Professor Barry Vercoe and ADI staff to design architectures for next
generations using four ADSP-21061 Sharcs in a shared-memory multiprocessing
cluster configuration with various SRAM, DRAM and FLASH memory configurations
for PLX PCI9060 interface to IBM-type PC hosts. Helped debug various software
segments including hardware drivers, PLX PCI interface, and multi-Sharc
configurations. Provided end-customer (Karaoke) liaison support with Taito
and Denon Corporations for multiple meetings held at ADI Norwood. These
systems are now being used to correct human singing pitch in real-time for
Karaoke applications, so every Karaoke singer can sound like a professional.
RN Communications, Inc., Chelmsford, Massachusetts, July 1994 to January 1995:
-Developed, debugged and optimized a Novell HSM PC device driver using
80x86 assembler language
(click here to view some 80x86 utility assembler language code)
for Novell ODI V4.0 certification; this NIC device
interfaces to PC thru IEEE-1284 parallel port, EISA bus and PCMCIA card
for (IEEE 802.11) CDMA Ethernet-like connectivity using spread-spectrum
frequency-hopping wireless LAN technology at 2.4 GHz. Wrote many related
software applications (e.g.-ROM bootstrap and checksum code and diagnostic
test interface) using Microsoft C-language. Developed various TI TMS320C51
DSP code segments
(click here to view some TI DSP CRC-16 assembler language code)
for the NIC and worked to optimize existing surface-
mounted DSP, Xylinx FPGA, QAM digital and baseband analog circuitry.
Advanced American Electronics (AAE), Inc., Cambridge, Massachusetts, May 1987
to June 1994:
-Software/Hardware/System designer and developer for a medium-sized digital
voice communications console similar to those used for small local police
and fire central dispatching. Software included DSP assembler language
(click here to view some Motorola 56K DSP assembler language code)
and PC assembler and C-language.
Hardware designs incorporated TI TMS32010/20 DSP
(click here to view some Texas Instruments DSP assembler language code)
chips and the Motorola DSP56001 DSP
on circuit boards for IBM PC-EISA system bus compatibility.
Designs featured completely digital operation based on
commercial voice-quality compression codecs operating over 2.048MHz.(bit
rate) T1 PCM data highways with an auxiliary RS-485 multidrop communications
highway for supervisory control. Two 32-slot T1 PCM data highways were
implemented, one each for transmit and receive directions. The data highways
were supported very closely by the MC56001 DSP Synchronous Serial Interface
(SSI) hardware and software. These designs used every available port on each
DSP including the host port for EISA bus communications with the PC host.
Added hardware and software for telephone patching, and for totally
electronic diskless bootstrap operation via EPROM to remove the floppy disk
drive mechanical system for increased reliability in the field.
MIT Media Laboratory, Cambridge, Massachusetts, February 1988 to February 1993:
-Music and Cognition Group research assistant, graduate student and UROP
supervisor. Modularized existing Real Time Audio Processor (RTAP)
hardware PCB and software for Apple Macintosh Computers with NuBus slot
space. Each RTAPV2 PCB operates as a NuBus Master or Slave and contains two
Motorola DSP56001 DSP processors each clocked at 27.0 MHz, 28 kilowords of
SRAM, one megaword of DRAM, and stereo-in/stereo-out AES/EBU digital
audio capability at sampling rates of 32.0, 44.1, 48.0 (kHz), or
synchronized with the incoming AES/EBU digital input stream. The six-layer
printed circuit board
(click here to see a photo of the RTAPV2 circuit board)
was designed and laid out using the Douglas CAD
package for the Macintosh computer family. All six prototype boards were
assembled by hand, three by myself and the rest by three undergraduate
research assistants under my supervision. One DSP operates the digital
audio input and output interfaces and communicates with the second DSP via
shared dual-port SRAM memory. The second DSP performs the audio processing
algorithms including real-time accompaniment of a human violinist with
an electronically controlled (MIDI) player piano.
In 1989 I designed a NuBus circuit board to convert 16-bit digital audio
samples to AES/EBU formatted serial digital audio streams for interface with
a studio-quality rack-mounted Yamaha model AD2X A/D converter and model
DA202 D/A converter.
The incoming and outgoing digital data was to and from the existing NuBus
RTAPV1 circuit board mounted in a neighboring NuBus slot;
the format converter board supported all three standard audio
sampling rates and featured an Intel 8752 CPU and Sony CXD1076 and CX23033
format conversion chips. The Sony CXD1076 AES/EBU receiver required an
outboard analog Phase Locked Loop (PLL) circuit shown outlined in white
silkscreening on the circuit board
(click here to see a photo of the AES/EBU format converter circuit board)
at the top of the board near the right side.
Two socketed four-layer prototype boards were designed by hand-drawing the
schematic diagram,
providing initial package locations with spares for
contingencies, hand-drawing the layout for the isolated analog PLL section,
providing explicit written layout rules and considerations, and outsourcing
the final layout to a CAD house that generated check plots for approval.
Final approval plots generated Gerber files used for
outsourced prototype manufacturing.
The prototype boards were assembled, programmed and successfully
tested before integrating this functionality onto the RTAPV2 circuit board
using the Crystal AES/EBU chipset.
Power Solutions, Inc., Kennebunk, Maine, May 1989 to June 1990:
-Systems and software engineering for the OPTIMA ® device, essentially a
scaled-down simpler and cheaper TACTUS ® device (see below). The Power
Solutions, Inc. president and I prepared, assembled, operated and
disassembled the Power Solutions trade show booth
(click here to see a photo of Tom at the PSI booth)
featuring the OPTIMA ® device
(click here to see a photo of the OPTIMA ®)
at the March 1990 Transmission & Distribution T & D World Expo '90 in
the Indianapolis, Indiana Convention Center. The patented OPTIMA ® device
technology was ultimately licensed and is now available under the name
OPTImizer+ ® produced by Intelligent Controls, Inc.
Intelligent Controls Website,
of Saco, Maine.
NEC Information Systems, Boxborough, Massachusetts, March & April 1987:
-Wrote the Functional Specification for the LC3310 30-ppm 300-ppi laser
printer controller for emulating the following five printer command
languages: Hewlett-Packard Laserjet Plus, Diablo 630 API/ECS, Epson FX-286,
Dataproducts, and Native mode.
Power Solutions, Inc., Kennebunk, Maine, July 1985 to February 1987:
-Assumed complete technical responsibility for the systems engineering and
software for the TACTUS ® device, a patented test instrument designed to
measure arcing current parameters (RMS and I²T) on nearby large
transmission and distribution circuit breakers used by the international
electric power industry.
(click here to see a photo of the TACTUS ® and handheld terminal)
I participated in the design and technical
background for the patent application process. I wrote a proposed functional
and design specification, then wrote a simulation program in Pascal to
investigate the proposed signal processing and accuracy. I designed a custom
real-time multi-tasking executive kernel which supported an AMD 8231A
APU floating-point co-processor operating in parallel with the Z-80 CPU.
I wrote all of the signal acquisition, conversion and processing software
including binary floating-point to printable decimal, and decimal to binary
IEEE standard 32-bit floating-point numbers. Also wrote all of the human
interface software featuring a four-line 80-character handheld display and
keyboard and front-panel LED percentage wear and heartbeat pulse indicators.
Framingham State College, Framingham, Massachusetts, Visiting Lecturer,
Spring & Fall 1983:
-Taught course 63.252, Computer Science II: covered
advanced PASCAL, FORTRAN-77 and advanced topics in data structures including
stacks, recursion and linked lists. Taught two hours per night for two nights
with one office hour each week, designed two homeworks and all four exams.
Northeastern University, Dedham, Massachusetts, Substitute Lecturer,
Fall 1982:
-Performed substitute teaching of course 09.784 on PDP-11 Assembler Language
Programming in night classes for Northeastern University's State of the Art
program at their Dedham campus.
Digital Equipment Corp., Marlborough, Massachusetts, January 1981 to
June 1985:
-Provided design, coding, documentation and technical supervision involving
device drivers for all operating systems, high-performance graphics
workstations, real-time laboratory data acquisition/control systems in the
Laboratory Data Products group, prototype manufacturing, hardware debugging,
configuration management and quality assurance.
Tau-Tron, Inc., Chelmsford, Massachusetts, June 1980 to October 1980:
-Implemented the prototype software/hardware system for the S5200D Receiver,
a Z80-based DS3 communications test receiver.
(click here to see a photo of the S5200D DS3 Test Receiver)
The fully-structured software
features real-time multi-tasking control of all high-speed hardware
activities, 32-bit integer and floating-point arithmetic and complete user
interaction allowing programmable testing and real-time updating of
the 40-character full/split display. These receivers are still available
today as used equipment via the internet.
Paramin, Inc., Wellesley, Massachusetts, staff consulting engineer,
September 1978 to June 1980:
-Performed estimation, design, coding and
implementation efforts involving manning requirements forecasting subsystems,
integrated circuit manufacturing tracking systems, in-house system management
and configuration, interactive touch-screen graphics, IBM protocol emulators
for 2780, 3270, BISYNC, HDLC and SDLC protocols,
electrical power generation process control systems,
cross-assemblers, down-loaders and magnetic tape drive formatting
for inter-system compatibility.
HRB-Singer, Inc., State College, Pennsylvania, staff systems engineer,
January 1976 to May 1978:
-Performed proposals, design, coding and
implementation for hardware and software systems specially designed for
government use, including systems involving satellite ephemeris data,
radar direction-of-arrival, FFT simulation, microcomputer control,
high-speed real-time distributed networking/data-acquisition using TCP/IP
and large command-control-communication systems.
Honeywell, Inc., Fort Washington, Pennsylvania, Junior Engineer,
Summer 1973:
-Performed reliability analyses on several components used in an AEC-FFTF
breeder reactor facility using MIL-217A handbook as a Junior Engineer in
the Evaluation Department.
Digital Rewind, A Symposium Celebrating the 25th Anniversary of the MIT
Experimental Music Studio, May 21, 1999:
Recording Secretary and Director, New England Computer Music Association (NEWCOMP), 1982.
EDUCATION
The Massachusetts Institute of Technology, Cambridge, Massachusetts:
Berklee College of Music, Boston, Massachusetts:
The Pennsylvania State University, State College, Pennsylvania:
MEMBERSHIPS
Registered Engineer-in-Training, State of Massachusetts since 1984.
Member, Institute of Electrical and Electronics Engineers (IEEE).
Member,
IEEE Consultants Network,
Boston Section (www.BOSTON-CONSULT.org).
Member, IEEE Computer Society and Signal Processing Society.
Member, Association for Computing Machinery (ACM).
Member, Audio Engineering Society (AES).
PUBLICATIONS
"Real-Time Psychoacoustic Music Data Compression" by Thomas Vincent
Maglione, MIT EECS Masters Thesis, October 23, 1992.
"A Platform for Real-time Perceptually-based Audio Data Reduction" by
Tom Maglione and Barry Vercoe, Proceedings of the International
Computer Music Conference, McGill University, Montreal, October 16-20, 1991.
CIRCUIT DESIGN EXPERIENCE
ANALOG: feedback control, audio, high-speed pulsed, op-amps, PLL's, RF.
DIGITAL: control, TTL, CMOS, ECL, microprocessor, bit-slice, I/O, FFT, FPGA/CPLD.
SAMPLES of hardware and system designs available for review by appointment.
COMPUTERS AND OPERATING SYSTEMS
Linux and Unix on workstations by Dell, AT & T, DEC, IBM, SGI, Sun, etc.
fixed- and floating-point Digital Signal Processors from Analog Devices, TI and Motorola.
Microsoft Windows 95/98/NT/2000/XP, Apple Macintosh.
Motorola MC6800/MC68000. Intel 8080/80x86/Pentium, 8751/52. Z80 CP/M.
Microprogramming on various custom processors.
LANGUAGES
Assembler languages for above processors.
C-language, C++, Object-Oriented design, HTML, XML, Java,
FORTRAN, PASCAL, LISP (COMMON-LISP, SCHEME), Smalltalk, A.I. Expert Systems,
X-Windows, LaTex document preparation language, Corel WordPerfect7,
Visio Standard 5.0,
MS Office 2003, MS Visual Studio, Sax Basic, Borland Delphi Pascal.
Hardware design languages PALASM, ABEL, CUPL, Douglas CAD for Macs,
MACH/Lattice, Protel, Mentor/PADS, AutoCAD, PCAD.
Various relational data base languages including Informix and SQL.
REFERENCES
Any of the listed companies may be contacted for information.
Specific references are available upon request.